Discussion:
[Arm-netbook] Testing: GPIO
Richard Wilbur
2018-01-18 22:11:47 UTC
Permalink
After looking at the schematics for the DS113 v2.7 2017-02-17 and the
microdesktop v1.7 I feel the need to ask whether there are more
up-to-date schematics available?

Results of my sleuthing thus far attached.
Luke Kenneth Casson Leighton
2018-01-18 23:37:00 UTC
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On Thu, Jan 18, 2018 at 10:11 PM, Richard Wilbur
Post by Richard Wilbur
After looking at the schematics for the DS113 v2.7 2017-02-17 and the
microdesktop v1.7 I feel the need to ask whether there are more
up-to-date schematics available?
nnope. that's it.
Post by Richard Wilbur
Results of my sleuthing thus far attached.
i'll have to double-check it. at least 8 pins are NC because they're
allocated to USB3. the EOMA68 spec page on pinouts is absolute
authoritative.

l.

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Richard Wilbur
2018-01-20 05:26:44 UTC
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Having taken a closer look I did find an equivalence mapping:

DS113 microdesktop
CON15 Net J14
pin name pin

1 SPI_MISO 1
2 SPI_MOSI 35
3 LCD0-D2 2 (LCDD2)
4 LCD0-D3 36 (LCDD3)
5 LCD0-D4 3 (LCDD4)
6 LCD0-D5 37 (LCDD5)
7 LCD0-D6 4 (LCDD6)
8 LCD0-D7 38 (LCDD7)
9 SPI_CLK 5 (SPI_SCK)
10 SPI_CE 39 (SPI_CS)
11 LCD0-D10 6 (LCDD10)
12 LCD0-D11 40 (LCDD11)
13 LCD0-D12 7 (LCDD12)
14 LCD0-D13 41 (LCDD13)
15 LCD0-D14 8 (LCDD14)
16 LCD0-D15 42 (LCDD15)
17 EINT1 9 (SC0-DETN)
18 POWER 43 (POWERON)
19 LCD0-D18 10 (LCDD18)
20 LCD0-D19 44 (LCDD19)
21 LCD0-D20 11 (LCDD20)
22 LCD0-D21 45 (LCDD21)
23 LCD0-D22 12 (LCDD22)
24 LCD0-D23 46 (LCDD23)
25 LCD0-CLK 13 (LCDCLK)
26 LCD0-VSYNC 47 (LCDVSYNC)
27 LCD0-HSYNC 14 (LCDHSYNC)
28 LCD0-DE 48 (LCDDE)
29 TWI1-SCK 15 (EOMA68-I2C-SCL)
30 TWI1-SDA 49 (EOMA68-I2C-SDA)
31 SD0-D3 16
32 SD0-D2 50
33 IR-RX 17 (VESA_SDA)
34 IR-TX 51 (GPIO_3)
35 SD0-CMD 18
36 SD0-CLK 52
37 SD0-D0 19
38 SD0-D1 53
39 NC 20 ()
40 NC 54 ()
41 NC 21 ()
42 NC 55 ()
43 PWM 22 (VESA_SCL)
44 PWFBOUT 56 (ETH_TAP)
45 UART0-TX 23 (EOMA68-UART_TX)
46 UART0-RX 57 (EOMA68-UART_RX)
47 ACIN-5V 24 (EOMA68-VCC-5V0)
48 ACIN-5V 58 (EOMA68-VCC-5V0)
49 NC 25 ()
50 NC 59 ()
51 EMAC-RDP 26 ()
52 EMAC-RDN 60 ()
53 EMAC-TDP 27 ()
54 EMAC-TDN 61 ()
55 NC 28 ()
56 NC 62 ()
57 ACIN-5V 29 (EOMA68-VCC-5V0)
58 ACIN-5V 63 (EOMA68-VCC-5V0)
59 DP1 30 (EOMA68-DP0)
60 DM1 64 (EOMA68-DM0)
61 GND 31
62 GND 65
63 EINT0 32
64 TTLREFOUT=VCC-3V3 66 (VREFTTL)
65 GND 33
66 GND 67
67 DP2 34
68 DM2 68
0 (GND)
0/2 (GND)
71 (GND)
72 (GND)
73 ()
74 ()

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Luke Kenneth Casson Leighton
2018-01-20 07:01:29 UTC
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On Sat, Jan 20, 2018 at 5:26 AM, Richard Wilbur
yeah this is a pain in the ass. the person who did the work 5 years
ago, after i EXPLICITLY sent them a schematic that had the correct
mapping, COMPLETELY fucking well ignored it and changed it from a 1,
2, 3 .... 68 mapping to a 1, 35, 2, 36 ... mapping.

fucking idiots.

anyway it's meant that i've had to ignore the pin numbers in the
schematic and go by pin positions. about 2 years ago i worked out a
trick which wouldn't screw with the PCB layout: adding a SECOND
connector, in position on top of the existing one, manually connecting
the tracks and then deleting the old one with the wrong pinouts.

the reason it has to be done that way is because if you *remove* the
[older, wrong] connector PADS rips up the fucking tracks, right the
way back to the damn processor pins. so i left it for 3 years until i
had worked out / learned a technique to avoid that happening.

*sigh*....

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Richard Wilbur
2018-01-23 07:40:16 UTC
Permalink
On Sat, Jan 20, 2018 at 12:01 AM, Luke Kenneth Casson Leighton
Post by Luke Kenneth Casson Leighton
anyway it's meant that i've had to ignore the pin numbers in the
schematic and go by pin positions. [...] so i left it for 3 years until i
had worked out / learned a technique to avoid that happening.
I'm sorry to hear it has been such a thorn in the side!

I went and read the EOMA68 specification since, as you mentioned, it
is normative. I then tried to update the testing wiki page and it
didn't seem to want to save my changes. I saved them off locally here
so I can try to figure out the problem and then reapply the changes.

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Luke Kenneth Casson Leighton
2018-01-23 09:08:11 UTC
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On Tue, Jan 23, 2018 at 7:40 AM, Richard Wilbur
Post by Richard Wilbur
On Sat, Jan 20, 2018 at 12:01 AM, Luke Kenneth Casson Leighton
Post by Luke Kenneth Casson Leighton
anyway it's meant that i've had to ignore the pin numbers in the
schematic and go by pin positions. [...] so i left it for 3 years until i
had worked out / learned a technique to avoid that happening.
I'm sorry to hear it has been such a thorn in the side!
ehn i got used to it.
Post by Richard Wilbur
I went and read the EOMA68 specification since, as you mentioned, it
is normative.
cool.
Post by Richard Wilbur
I then tried to update the testing wiki page and it
didn't seem to want to save my changes.
that's happened occasionally in the past. i've done a manual rebuild.
Post by Richard Wilbur
I saved them off locally here
so I can try to figure out the problem and then reapply the changes.
git log compared to "Recent Changes" showed that there were 4
revisions that hadn't been applied.

did you get at any point a failure of the "page updated" thing or at
any point interrupt the cgi script whilst it was rebuilding the page?
ikiwiki works by generating static HTML using cgi-bin perl scripts
that pull markdown (etc.) out of the git repository. it can be... a
little fragile.

l.

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Richard Wilbur
2018-01-23 10:40:19 UTC
Permalink
Post by Luke Kenneth Casson Leighton
On Tue, Jan 23, 2018 at 7:40 AM, Richard Wilbur
[…]
Post by Luke Kenneth Casson Leighton
git log compared to "Recent Changes" showed that there were 4
revisions that hadn't been applied.
That may explain why the displayed version of the page didn't change but the preview did change and when I logged out and back in all of my previous edits showed back up in the page source.
Post by Luke Kenneth Casson Leighton
did you get at any point a failure of the "page updated" thing or at
any point interrupt the cgi script whilst it was rebuilding the page?
ikiwiki works by generating static HTML using cgi-bin perl scripts
that pull markdown (etc.) out of the git repository. it can be... a
little fragile.
I got an error message that said there had been a failure of the CGI script--I don't remember the exact wording. If I did interrupt something I'm not sure how I accomplished that as I was trying to be patient and wait till it was done before initiating anything new.

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Luke Kenneth Casson Leighton
2018-01-23 10:43:01 UTC
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On Tue, Jan 23, 2018 at 10:40 AM, Richard Wilbur
Post by Richard Wilbur
I got an error message that said there had been a failure of the CGI script--I don't remember the exact wording. If I did interrupt something I'm not sure how I accomplished that as I was trying to be patient and wait till it was done before initiating anything new.
if it happens again please take a screenshot, it's important as it
means there's a bug in ikiwiki that is essential to report and get
fixed.

l.

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Richard Wilbur
2018-01-23 11:23:27 UTC
Permalink
Post by Luke Kenneth Casson Leighton
if it happens again please take a screenshot, it's important as it
means there's a bug in ikiwiki that is essential to report and get
fixed.
I will do so. Thank you for helping sort this out.

By the way, do you happen to know in what language ikiwiki is written?
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Luke Kenneth Casson Leighton
2018-01-23 11:33:42 UTC
Permalink
On Tue, Jan 23, 2018 at 11:23 AM, Richard Wilbur
Post by Richard Wilbur
By the way, do you happen to know in what language ikiwiki is written?
perl. *gibber, shake*. luckily it was written by an absolute genius
who actually cares and is like... really responsible. otherwise
ikiwiki would be a dog's dinner.

l.

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Richard Wilbur
2018-01-26 19:43:13 UTC
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On Tue, Jan 23, 2018 at 3:43 AM, Luke Kenneth Casson Leighton
<***@lkcl.net> wrote:
[...]
Post by Luke Kenneth Casson Leighton
if it happens again please take a screenshot, it's important as it
means there's a bug in ikiwiki that is essential to report and get
fixed.
I added some more details and selected "Save" and after awhile my
browser came back with a page that says only:
"An error occurred while writing CGI reply"

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Richard Wilbur
2018-01-26 19:45:33 UTC
Permalink
On Fri, Jan 26, 2018 at 12:43 PM, Richard Wilbur
<***@gmail.com> wrote:
[...]
Post by Richard Wilbur
I added some more details and selected "Save" and after awhile my
"An error occurred while writing CGI reply"
I don't know whether this is a cause of the error but I had forgotten
to type anything in the comment section. If that causes problems,
sounds like it would be a fine candidate for input data validation.

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Richard Wilbur
2018-02-28 21:09:42 UTC
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After realizing that you mentioned all 8 GPIO lines were on the 20-pin
expansion header J5 in the microdesktop case, I consulted the
microdesktop schematic for clues.

I suspect the UART and EOMA I2C pins should be left to those functions.

I have added tables to the "Testing"[*] page under the "GPIO" section
with my nominations for which pins to test and their mapping back to
A20 register bits.

Luke, does this match your understanding of the GPIO pins to test?

Reference:
[*] http://rhombus-tech.net/allwinner_a10/testing

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Luke Kenneth Casson Leighton
2018-02-28 21:41:24 UTC
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On Wed, Feb 28, 2018 at 9:09 PM, Richard Wilbur
Post by Richard Wilbur
After realizing that you mentioned all 8 GPIO lines were on the 20-pin
expansion header J5 in the microdesktop case, I consulted the
microdesktop schematic for clues.
I suspect the UART and EOMA I2C pins should be left to those functions.
yehyeh. UART implicitly tested "if console works it's probably
good" and I2C with a bus scan, i2c-utils, if 0x51 EEPROM shows up,
it's good.
Post by Richard Wilbur
I have added tables to the "Testing"[*] page under the "GPIO" section
with my nominations for which pins to test and their mapping back to
A20 register bits.
awesome. it'll have to be done manually for now,
Post by Richard Wilbur
Luke, does this match your understanding of the GPIO pins to test?
yep - GPIO_19,20,21 missing.
Post by Richard Wilbur
[*] http://rhombus-tech.net/allwinner_a10/testing
hey that looks great!

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Richard Wilbur
2018-03-01 20:33:30 UTC
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On Wed, Feb 28, 2018 at 2:41 PM, Luke Kenneth Casson Leighton
Post by Luke Kenneth Casson Leighton
On Wed, Feb 28, 2018 at 9:09 PM, Richard Wilbur
Post by Richard Wilbur
After realizing that you mentioned all 8 GPIO lines were on the 20-pin
expansion header J5 in the microdesktop case, I consulted the
microdesktop schematic for clues.
I suspect the UART and EOMA I2C pins should be left to those functions.
yehyeh. UART implicitly tested "if console works it's probably
good" and I2C with a bus scan, i2c-utils, if 0x51 EEPROM shows up,
it's good.
Post by Richard Wilbur
I have added tables to the "Testing"[*] page under the "GPIO" section
with my nominations for which pins to test and their mapping back to
A20 register bits.
awesome. it'll have to be done manually for now,
Are you suggesting that the testing "will have to be done manually"?
What is the time frame of "for now"?

I'm trying to figure out which pins of the expansion header we want to
test, which pins of the processor those correspond to, and thus which
registers and bits of those registers we need to manipulate. That
determines how I need to interact with the GPIO driver.
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
Luke, does this match your understanding of the GPIO pins to test?
yep - GPIO_19,20,21 missing.
In the following table (created while I was trying to figure out which
GPIO were connected in the EOMA standard) you will see that EOMA nets
GPIO(18)/EINT3, GPIO(19), GPIO(20), and GPIO(21) are not connected on
the microdesktop schematic v1.7 from J14. Thus they are at J14 but
not available anywhere else in the microdesktop v1.7.

1342 Fri 23 Feb 2018:
EOMA A20 DS113 microdesktop
Net Name ball register CON15 pin J14 pin
PWM B19 PI3 43 22 GPIO(10)
EINT0 A6 PH0 63 32 GPIO(11)
EINT1 B6 PH1 17 9 GPIO(16)
EINT2 B2 PH14 44 56 PWFBOUT GPIO(17)
EINT3 C2 PH18 39 20 NC GPIO(18)
GPIO(19) A1 PH15 40 54 NC
GPIO(20) C1 PH17 41 21 NC
GPIO(21) B1 PH16 42 55 NC

We could obviously create a v1.8 schematic for the microdesktop and
connect these EOMA nets to a header, if desired.

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Luke Kenneth Casson Leighton
2018-03-01 20:50:00 UTC
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Post by Richard Wilbur
On Wed, Feb 28, 2018 at 2:41 PM, Luke Kenneth Casson Leighton
Post by Luke Kenneth Casson Leighton
On Wed, Feb 28, 2018 at 9:09 PM, Richard Wilbur
Post by Richard Wilbur
After realizing that you mentioned all 8 GPIO lines were on the 20-pin
expansion header J5 in the microdesktop case, I consulted the
microdesktop schematic for clues.
I suspect the UART and EOMA I2C pins should be left to those functions.
yehyeh. UART implicitly tested "if console works it's probably
good" and I2C with a bus scan, i2c-utils, if 0x51 EEPROM shows up,
it's good.
Post by Richard Wilbur
I have added tables to the "Testing"[*] page under the "GPIO" section
with my nominations for which pins to test and their mapping back to
A20 register bits.
awesome. it'll have to be done manually for now,
Are you suggesting that the testing "will have to be done manually"?
the mapping created manually. sorry, i was thinking in terms of
device-tree fragments... which don't exist yet.
Post by Richard Wilbur
What is the time frame of "for now"?
when testing is required.
Post by Richard Wilbur
I'm trying to figure out which pins of the expansion header we want to
test, which pins of the processor those correspond to, and thus which
registers and bits of those registers we need to manipulate. That
determines how I need to interact with the GPIO driver.
yehyeh. and determining that interaction "has to be done manually".
if the devicetree fragment existed it would be a much simpler matter.
Post by Richard Wilbur
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
Luke, does this match your understanding of the GPIO pins to test?
yep - GPIO_19,20,21 missing.
In the following table (created while I was trying to figure out which
GPIO were connected in the EOMA standard) you will see that EOMA nets
GPIO(18)/EINT3, GPIO(19), GPIO(20), and GPIO(21) are not connected on
the microdesktop schematic v1.7 from J14. Thus they are at J14 but
not available anywhere else in the microdesktop v1.7.
yep, forgot that. why the heck did i leave them out?? duur...
Post by Richard Wilbur
EOMA A20 DS113 microdesktop
Net Name ball register CON15 pin J14 pin
PWM B19 PI3 43 22 GPIO(10)
EINT0 A6 PH0 63 32 GPIO(11)
EINT1 B6 PH1 17 9 GPIO(16)
EINT2 B2 PH14 44 56 PWFBOUT GPIO(17)
EINT3 C2 PH18 39 20 NC GPIO(18)
GPIO(19) A1 PH15 40 54 NC
GPIO(20) C1 PH17 41 21 NC
GPIO(21) B1 PH16 42 55 NC
We could obviously create a v1.8 schematic for the microdesktop and
connect these EOMA nets to a header, if desired.
yes. damn. i think it's probably that i didn't update the
micro-desktop schematic when i changed the EOMA68 spec from 24-pin to
18-pin RGB/TTL.

l.

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Richard Wilbur
2018-03-01 21:25:46 UTC
Permalink
On Thu, Mar 1, 2018 at 1:50 PM, Luke Kenneth Casson Leighton
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
We could obviously create a v1.8 schematic for the microdesktop and
connect these EOMA nets to a header, if desired.
yes. damn. i think it's probably that i didn't update the
micro-desktop schematic when i changed the EOMA68 spec from 24-pin to
18-pin RGB/TTL.
Maybe you didn't update the micro-desktop schematic as much as you
intended to when you changed the EOMA68 spec from 24-pin to 18-pin
RGB/TTL but in v1.7 you did at least connect only the 6 high bits of
each color to the D/A convertors. The new pins are all connected to
useful sub-circuits on the micro-desktop board: SPI (expansion
header), SD0 (SD slot), and PWRON (power switch).

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Richard Wilbur
2018-03-01 21:46:31 UTC
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It looks to me like the fastest way to test the GPIO lines connected
on the micro-desktop board to VESA_SCL and VESA_SDA would simply be to
connect a VGA monitor to the micro-desktop and make sure it is
properly detected and a test image looks right on it. This would
leave 6 GPIO lines to test. So we get better test coverage for the
EOMA interface and shorter GPIO test at the same time!

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Christopher Havel
2018-03-01 21:54:15 UTC
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Oh LOL.

VGA is analog, and has six wires for color (red signal, red ground, ditto
each for blue and green). It's not /exactly/ serial (serial as I understand
it is inherently digital, which VGA is *ahem* very much not) but the
paradigm sort of fits. RGBTTL is parallel. You have one wire per bit of
color. So that's 18 wires. Plus your sync lines... which may or may not
match VGA signal standards, I'm not sure.

If you actually manage to figure out how to get that hooked up correclty,
let me know ;)

(Hint, it's doable, but you need additional components. There's a cheap
way, and there's an easy way, and they are two *very* different ways...)

Much easier suggestion: get a small LCD. *ANY* small LCD. Like a five or
seven inch display at the largest. Raw panel, no driver board. Get the
datasheet and a compatible connector. (If you source from eBay this is very
easy; those are almost all commodity displays with available datasheets.)
If it's a SMALL DISPLAY it *will* be RGBTTL, 90%+ of the time (I've seen
one exception to this ever and it was in an off-brand portable DVD player).
Wire it up. Wire it to the card connector. Add power. If you get a screen
that works, you've done it right.
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Richard Wilbur
2018-03-01 22:42:02 UTC
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Post by Christopher Havel
Oh LOL.
VGA is analog, and has six wires for color (red signal, red ground, ditto
each for blue and green). It's not /exactly/ serial (serial as I understand
it is inherently digital, which VGA is *ahem* very much not) but the
paradigm sort of fits. RGBTTL is parallel. You have one wire per bit of
color. So that's 18 wires. Plus your sync lines... which may or may not
match VGA signal standards, I'm not sure.
If you actually manage to figure out how to get that hooked up correclty,
let me know ;)
(Hint, it's doable, but you need additional components. There's a cheap
way, and there's an easy way, and they are two *very* different ways...)
Looking at the micro-desktop schematic it seems Luke has this issue
well in hand. Christopher have you seen the micro-desktop schematic?
The VGA conversion is on page 3.

Luke, have you tested the D/A circuit on the micro-desktop board?
Only thing I would worry about is the hold time on the data lines. If
the A20 sets up the data quickly (relative to the pixel time) and
holds it until the next setup, we should be in good shape.
Post by Christopher Havel
Much easier suggestion: get a small LCD. *ANY* small LCD. Like a five or
seven inch display at the largest. Raw panel, no driver board. Get the
datasheet and a compatible connector. (If you source from eBay this is very
easy; those are almost all commodity displays with available datasheets.)
If it's a SMALL DISPLAY it *will* be RGBTTL, 90%+ of the time (I've seen
one exception to this ever and it was in an off-brand portable DVD player).
Wire it up. Wire it to the card connector. Add power. If you get a screen
that works, you've done it right.
I think this is why Luke put the display signals on the EOMA68
standard in the RGBTTL format--to simplify the job of connecting to
LCD's. (I'm thinking of the laptop, tablet, gaming console, phone,
etc.)

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Luke Kenneth Casson Leighton
2018-03-02 03:40:01 UTC
Permalink
On Thu, Mar 1, 2018 at 10:42 PM, Richard Wilbur
Post by Richard Wilbur
Luke, have you tested the D/A circuit on the micro-desktop board?
yep it works great up to 1024x768. i haven't yet been able to get it
to sync at anything greater than that, because you have to manually
convert the signals into A20 timings... and of course if you can't
read the EDID data you don't know *exactly* what the settings are in
the first place for any given monitor.

1024x768, being a common VESA standard, has worked consistently on
every monitor i've tried.
Post by Richard Wilbur
Only thing I would worry about is the hold time on the data lines. If
the A20 sets up the data quickly (relative to the pixel time) and
holds it until the next setup, we should be in good shape.
sigh yeah i thought about that... using buffer ICs with a "hold", and
linking up the clock line to it.... never got round to it. i'd prefer
to just skip the entire circuit and use a TFP410 (or maybe it's a
TFP401a), or a Chrontel RGB/TTL to VGA converter IC. CH7036 i think
it is.
Post by Richard Wilbur
Post by Christopher Havel
Much easier suggestion: get a small LCD. *ANY* small LCD. Like a five or
seven inch display at the largest. Raw panel, no driver board. Get the
datasheet and a compatible connector. (If you source from eBay this is very
easy; those are almost all commodity displays with available datasheets.)
If it's a SMALL DISPLAY it *will* be RGBTTL, 90%+ of the time (I've seen
one exception to this ever and it was in an off-brand portable DVD player).
Wire it up. Wire it to the card connector. Add power. If you get a screen
that works, you've done it right.
I think this is why Luke put the display signals on the EOMA68
standard in the RGBTTL format--to simplify the job of connecting to
LCD's. (I'm thinking of the laptop, tablet, gaming console, phone,
etc.)
yyup. exactly. remember, you can't do more than one interface on
any given set of pins, so i had to pick one (RGB/TTL or LVDS or MIPI
or eDP), that then means you have to have a conversion IC in-place on
the Card if a particular SoC doesn't *have* that interface... and many
of the lower-cost SoCs don't because they're not part of the MIPI or
DisplayPort cartel(s)....

... and even if you had LVDS, the cost on the other side (Housing
side) of having an LVDS-to-RGB/TTL converter is so high relative to
the cost of the LCD itself that companies would rebel and not bother
with the standard at all.

so, bizarrely, RGB/TTL, by being both "free" and also unencumbered by
patents *and* by being lowest-common-denominator, wins out on all
fronts. except for the fact that you need a 125mhz clock-rate for
***@60fps, which is a bit... high. but hey.

l.

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Luke Kenneth Casson Leighton
2018-03-02 10:07:06 UTC
Permalink
btw i'm tempted to suggest treating the SPI pins as straight GPIO. if
they can do 0 and 1 (input and output) then they're not
short-circuited and/or disconnected and that's... good enough.

l.

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Richard Wilbur
2018-03-02 23:25:50 UTC
Permalink
Post by Luke Kenneth Casson Leighton
btw i'm tempted to suggest treating the SPI pins as straight GPIO. if
they can do 0 and 1 (input and output) then they're not
short-circuited and/or disconnected and that's... good enough.
So test them as GPIO for now?

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Richard Wilbur
2018-03-02 23:24:12 UTC
Permalink
Post by Luke Kenneth Casson Leighton
On Thu, Mar 1, 2018 at 10:42 PM, Richard Wilbur
Post by Richard Wilbur
Luke, have you tested the D/A circuit on the micro-desktop board?
yep it works great up to 1024x768. i haven't yet been able to get it
to sync at anything greater than that, because you have to manually
convert the signals into A20 timings... and of course if you can't
read the EDID data you don't know *exactly* what the settings are in
the first place for any given monitor.
1024x768, being a common VESA standard, has worked consistently on
every monitor i've tried.
So if we could read the EDID the driver would figure out the A20 timings? Does the A20 already have a graphics driver capable of that? (In which case the bit-banging VESA DDC driver becomes very important.) How much of this infrastructure already exists? I'm bringing my tools, where do we start building?

I have a collection of VGA monitors with different aspect ratios and sizes (3 CRT and 3 LCD). I'd be happy to test resolutions above and below 1024x768.
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
Only thing I would worry about is the hold time on the data lines. If
the A20 sets up the data quickly (relative to the pixel time) and
holds it until the next setup, we should be in good shape.
sigh yeah i thought about that... using buffer ICs with a "hold", and
linking up the clock line to it.... never got round to it. i'd prefer
to just skip the entire circuit and use a TFP410 (or maybe it's a
TFP401a), or a Chrontel RGB/TTL to VGA converter IC. CH7036 i think
it is.
Are you thinking of octal D flip-flops? I'll have to look up those datasheets. What do those chips offer over the flip-flops? How do the prices compare?

[…]
Post by Luke Kenneth Casson Leighton
yyup. exactly. remember, you can't do more than one interface on
any given set of pins, so i had to pick one (RGB/TTL or LVDS or MIPI
or eDP), that then means you have to have a conversion IC in-place on
the Card if a particular SoC doesn't *have* that interface... and many
of the lower-cost SoCs don't because they're not part of the MIPI or
DisplayPort cartel(s)....
Yes, that's the awful thing about so many industry standards: you can't get the text without signing documents and paying a handsome price, you can't use them without paying royalties to the patent owners.
Post by Luke Kenneth Casson Leighton
... and even if you had LVDS, the cost on the other side (Housing
side) of having an LVDS-to-RGB/TTL converter is so high relative to
the cost of the LCD itself that companies would rebel and not bother
with the standard at all.
so, bizarrely, RGB/TTL, by being both "free" and also unencumbered by
patents *and* by being lowest-common-denominator, wins out on all
fronts. except for the fact that you need a 125mhz clock-rate for
Will the A20 clock the RGBTTL interface that high?
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Luke Kenneth Casson Leighton
2018-03-03 01:36:08 UTC
Permalink
---
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On Fri, Mar 2, 2018 at 11:24 PM, Richard Wilbur
Post by Richard Wilbur
Post by Luke Kenneth Casson Leighton
On Thu, Mar 1, 2018 at 10:42 PM, Richard Wilbur
Post by Richard Wilbur
Luke, have you tested the D/A circuit on the micro-desktop board?
yep it works great up to 1024x768. i haven't yet been able to get it
to sync at anything greater than that, because you have to manually
convert the signals into A20 timings... and of course if you can't
read the EDID data you don't know *exactly* what the settings are in
the first place for any given monitor.
1024x768, being a common VESA standard, has worked consistently on
every monitor i've tried.
So if we could read the EDID the driver would figure out the A20 timings?
no. some code is needed to *translate* EDID into A20 timings.
Post by Richard Wilbur
Does the A20 already have a graphics driver capable of that?
no. the general assumption is that RGB/TTL is used for *fixed* size
LCDs. therefore why on earth, the logic goes, would you put a dynamic
EDID bridge in place?
Post by Richard Wilbur
(In which case the bit-banging VESA DDC driver becomes very
important.) How much of this infrastructure already exists?
bits and pieces. mainly it's integration.
Post by Richard Wilbur
I'm bringing my tools, where do we start building?
:)
Post by Richard Wilbur
I have a collection of VGA monitors with different aspect ratios
and sizes (3 CRT and 3 LCD). I'd be happy to test resolutions above
and below 1024x768.
yay.
Post by Richard Wilbur
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
Only thing I would worry about is the hold time on the data lines. If
the A20 sets up the data quickly (relative to the pixel time) and
holds it until the next setup, we should be in good shape.
sigh yeah i thought about that... using buffer ICs with a "hold", and
linking up the clock line to it.... never got round to it. i'd prefer
to just skip the entire circuit and use a TFP410 (or maybe it's a
TFP401a), or a Chrontel RGB/TTL to VGA converter IC. CH7036 i think
it is.
Are you thinking of octal D flip-flops? I'll have to look up those datasheets. What do those chips offer over the flip-flops? How do the prices compare?
no idea haven't investigtated.
Post by Richard Wilbur
[…]
Post by Luke Kenneth Casson Leighton
yyup. exactly. remember, you can't do more than one interface on
any given set of pins, so i had to pick one (RGB/TTL or LVDS or MIPI
or eDP), that then means you have to have a conversion IC in-place on
the Card if a particular SoC doesn't *have* that interface... and many
of the lower-cost SoCs don't because they're not part of the MIPI or
DisplayPort cartel(s)....
you can't get the text without signing documents and paying
a handsome price, you can't use them without paying royalties
to the patent owners.
... which is why i'm not putting CAN bus into any of the libre-riscv SoCs...
Post by Richard Wilbur
Post by Luke Kenneth Casson Leighton
... and even if you had LVDS, the cost on the other side (Housing
side) of having an LVDS-to-RGB/TTL converter is so high relative to
the cost of the LCD itself that companies would rebel and not bother
with the standard at all.
so, bizarrely, RGB/TTL, by being both "free" and also unencumbered by
patents *and* by being lowest-common-denominator, wins out on all
fronts. except for the fact that you need a 125mhz clock-rate for
Will the A20 clock the RGBTTL interface that high?
yes. despite the fuckwits in the marketing department in *competing
divisions* inside allwinner trying to tell the world otherwise.
they've dumbed down the public marketted specification of the A20 to
1024x768 because its capabilities for the price were making other
offerings look *really* bad.

l.

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Richard Wilbur
2018-03-01 22:02:04 UTC
Permalink
If we did decide to roll a v1.8 micro-desktop board, it would afford
us the opportunity to bring two of the presently unconnected GPIO18-21
lines to the expansion header in place of VESA_SCL and VESA_SDA (which
are after all available on pins 15 and 12 of the VGA connector). If
VESA_SCL and VESA_SDA are more useful on the expansion header then, by
all means, forget this suggestion.

The other option to accommodate all our GPIO goodness would be to
replace J5 (2x10 header) with a 2x11 or 2x12 header allowing us to
bring all the GPIO pins to the expansion header (the only difference
being whether we would prefer to retain VESA_SCL and VESA_SDA in the
header).

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Christopher Havel
2018-03-01 22:05:41 UTC
Permalink
...BTW, those SCL and SDA lines on a VGA connector are for a nifty signal
coming from your monitor. It's called EDID and it's basically how every
modern OS magically knows what to do with the monitor it wants to display
on, regardless of the specs or origin of said monitor.

If you've ever had a cheap VGA cable where all the pins are present on the
connectors but those two lines are disconnected internally, you have
experience with what happens when you eff with those wires. Best to leave
them alone!
Post by Richard Wilbur
If we did decide to roll a v1.8 micro-desktop board, it would afford
us the opportunity to bring two of the presently unconnected GPIO18-21
lines to the expansion header in place of VESA_SCL and VESA_SDA (which
are after all available on pins 15 and 12 of the VGA connector). If
VESA_SCL and VESA_SDA are more useful on the expansion header then, by
all means, forget this suggestion.
The other option to accommodate all our GPIO goodness would be to
replace J5 (2x10 header) with a 2x11 or 2x12 header allowing us to
bring all the GPIO pins to the expansion header (the only difference
being whether we would prefer to retain VESA_SCL and VESA_SDA in the
header).
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Richard Wilbur
2018-03-01 22:50:54 UTC
Permalink
Post by Christopher Havel
...BTW, those SCL and SDA lines on a VGA connector are for a nifty signal
coming from your monitor. It's called EDID and it's basically how every
modern OS magically knows what to do with the monitor it wants to display
on, regardless of the specs or origin of said monitor.
If you've ever had a cheap VGA cable where all the pins are present on the
connectors but those two lines are disconnected internally, you have
experience with what happens when you eff with those wires. Best to leave
them alone!
Christopher, you are quite correct about the usefullness of
untarnished VESA EDID. Turns out I've worked with it before and
respect its utility with respect to VGA/DVI/HDMI monitors.

We are simply talking about how to test the DS-113 EOMA68-A20
processor cards when they come to the end of the assembly line. In
that regard, our discussion is mainly about how to create a test
jig/fixture that has the most complete coverage of the signals
available on the EOMA68 interface and some of the possible use
scenarios. We also have an interest in time efficiency as a matter of
economy.

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Christopher Havel
2018-03-01 23:12:24 UTC
Permalink
I /designed/ that circuitry in the micro-desktop. I still have the paper
copy somewhere...

You can also do it with a dedicated DAC chip, which is the
easy-but-expensive way I hinted at.

But we aren't testing /that/ part -- the micro-desktop -- are we? If we're
testing the /card/, the card does not output anything remotely like VGA,
and, therefore, some kind of conversion is necessary in order to attach it
to a VGA cable as was being proposed in the email I replied to about that.

All you really need for this is a laptop PCMCIA or CardBus card cage, an
IDE cable or two, a couple 4051s and toggle switches on a slice of
perfboard, a 9v battery with connector and switch, and a cheap USB logic
analyzer attached to a laptop. You use the 4051s, switched manually, and
powered by the 9v battery, to act as input expanders for the logic
analyzer. Each 4015 turns one channel into eight and requires three "on-on"
switches -- with one "on" wired to +9v, one to ground, and the common to
the chip. You use the IDE cable for the wires ;) If you hook it up so that
you have one 4051 mux per logic analyzer channel, that'll give you 128 (!)
channels to switch with -- most USB logic analyzers, even the super cheap
ones, are 16-channel...

Heck, if you wanted to make the circuit "complicated" -- I could draw up
something that automatically iterated through the channels for you at the
press of a single button, switching at variable speed with a pot, a 555, a
resistor and cap, and a couple 4017s and 4051s. You'd only need /one/
channel for that -- so you could even use an o-scope there. Heck, I could
do it with that circuit and my old, old Tektronix 422...

I'm honestly surprised that this sort of idea hasn't been mentioned yet.
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Richard Wilbur
2018-03-02 00:03:55 UTC
Permalink
Post by Christopher Havel
I /designed/ that circuitry in the micro-desktop. I still have the paper
copy somewhere...
Very nice!
Post by Christopher Havel
You can also do it with a dedicated DAC chip, which is the
easy-but-expensive way I hinted at.
But we aren't testing /that/ part -- the micro-desktop -- are we? If we're
testing the /card/, the card does not output anything remotely like VGA,
and, therefore, some kind of conversion is necessary in order to attach it
to a VGA cable as was being proposed in the email I replied to about that.
We aren't planning to test the micro-desktop. The planning is for
tests of the card mounted in a micro-desktop case to use as a test
fixture. We are planning to use your good work on the micro-desktop
case to our advantage and connect the VGA cable to the micro-desktop
VGA connector in order to see that the EOMA68 RGBTTL (with EDID) works
as advertised!
Post by Christopher Havel
All you really need for this is a laptop PCMCIA or CardBus card cage, an
IDE cable or two, a couple 4051s and toggle switches on a slice of
perfboard, a 9v battery with connector and switch, and a cheap USB logic
analyzer attached to a laptop. You use the 4051s, switched manually, and
powered by the 9v battery, to act as input expanders for the logic
analyzer. Each 4015 turns one channel into eight and requires three "on-on"
switches -- with one "on" wired to +9v, one to ground, and the common to
the chip. You use the IDE cable for the wires ;) If you hook it up so that
you have one 4051 mux per logic analyzer channel, that'll give you 128 (!)
channels to switch with -- most USB logic analyzers, even the super cheap
ones, are 16-channel...
Heck, if you wanted to make the circuit "complicated" -- I could draw up
something that automatically iterated through the channels for you at the
press of a single button, switching at variable speed with a pot, a 555, a
resistor and cap, and a couple 4017s and 4051s. You'd only need /one/
channel for that -- so you could even use an o-scope there. Heck, I could
do it with that circuit and my old, old Tektronix 422...
I'm honestly surprised that this sort of idea hasn't been mentioned yet.
That is a cool way to set up a very wide logic analyzer. We were
planning to use a little specialized hardware and less elbow grease to
make our test fixture:
* USB devices connected to the micro-desktop case USB ports,
* SD peripheral connected to the micro SD slot,
* VGA monitor connected to the VGA connector,
* serial terminal connected to the UART pins in expansion header

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Christopher Havel
2018-03-02 00:10:15 UTC
Permalink
Posting from my phone while making dinner, so forgive that it's a top-post
plz.

Testing via the micro desktop works as long as you've got a known good
micro desktop and your ports haven't won through. I think the 4051 idea
might be a little better - I've worn out USB ports before, just from using
them - ask me sometime about my mother's old VAIO laptop and how it
ultimately died... the only thing in my test rig to wear out is the card
cage...

But, I'm not in charge, so I'll defer.
Post by Richard Wilbur
Post by Christopher Havel
I /designed/ that circuitry in the micro-desktop. I still have the paper
copy somewhere...
Very nice!
Post by Christopher Havel
You can also do it with a dedicated DAC chip, which is the
easy-but-expensive way I hinted at.
But we aren't testing /that/ part -- the micro-desktop -- are we? If
we're
Post by Christopher Havel
testing the /card/, the card does not output anything remotely like VGA,
and, therefore, some kind of conversion is necessary in order to attach
it
Post by Christopher Havel
to a VGA cable as was being proposed in the email I replied to about
that.
We aren't planning to test the micro-desktop. The planning is for
tests of the card mounted in a micro-desktop case to use as a test
fixture. We are planning to use your good work on the micro-desktop
case to our advantage and connect the VGA cable to the micro-desktop
VGA connector in order to see that the EOMA68 RGBTTL (with EDID) works
as advertised!
Post by Christopher Havel
All you really need for this is a laptop PCMCIA or CardBus card cage, an
IDE cable or two, a couple 4051s and toggle switches on a slice of
perfboard, a 9v battery with connector and switch, and a cheap USB logic
analyzer attached to a laptop. You use the 4051s, switched manually, and
powered by the 9v battery, to act as input expanders for the logic
analyzer. Each 4015 turns one channel into eight and requires three
"on-on"
Post by Christopher Havel
switches -- with one "on" wired to +9v, one to ground, and the common to
the chip. You use the IDE cable for the wires ;) If you hook it up so
that
Post by Christopher Havel
you have one 4051 mux per logic analyzer channel, that'll give you 128
(!)
Post by Christopher Havel
channels to switch with -- most USB logic analyzers, even the super cheap
ones, are 16-channel...
Heck, if you wanted to make the circuit "complicated" -- I could draw up
something that automatically iterated through the channels for you at the
press of a single button, switching at variable speed with a pot, a 555,
a
Post by Christopher Havel
resistor and cap, and a couple 4017s and 4051s. You'd only need /one/
channel for that -- so you could even use an o-scope there. Heck, I could
do it with that circuit and my old, old Tektronix 422...
I'm honestly surprised that this sort of idea hasn't been mentioned yet.
That is a cool way to set up a very wide logic analyzer. We were
planning to use a little specialized hardware and less elbow grease to
* USB devices connected to the micro-desktop case USB ports,
* SD peripheral connected to the micro SD slot,
* VGA monitor connected to the VGA connector,
* serial terminal connected to the UART pins in expansion header
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Richard Wilbur
2018-03-02 00:19:44 UTC
Permalink
Post by Christopher Havel
Posting from my phone while making dinner, so forgive that it's a top-post
plz.
Testing via the micro desktop works as long as you've got a known good
micro desktop and your ports haven't won through. I think the 4051 idea
might be a little better - I've worn out USB ports before, just from using
them - ask me sometime about my mother's old VAIO laptop and how it
ultimately died... the only thing in my test rig to wear out is the card
cage...
But, I'm not in charge, so I'll defer.
You make very good points about connector fatigue. I was planning to
leave everything connected and only install/remove the EOMA68 card
from the micro-desktop case. That works as long as we don't need to
test hot-plugging anything. To my knowledge we figured the hot-plug
capability would likely be conferred by the applicable standard and
thus were designing a basic functionality test.

(Incidentally I have a dead VAIO laptop in which the power jack center
pin broke. I really need to get that ordered and replaced.;>)

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Christopher Havel
2018-03-02 00:23:31 UTC
Permalink
Be careful... it was the replacing of the two ports on that old VGN-S360
that killed it... VAIOs are well known in repair circles for dying of
heatstroke from even the slightest rework (and I was duly warned)... if
it's a modular jack (on a cable, so no soldering), you'll be fine. If you
need an iron... buy a board, not a port. Trust me.
Post by Christopher Havel
Post by Christopher Havel
Posting from my phone while making dinner, so forgive that it's a
top-post
Post by Christopher Havel
plz.
Testing via the micro desktop works as long as you've got a known good
micro desktop and your ports haven't won through. I think the 4051 idea
might be a little better - I've worn out USB ports before, just from
using
Post by Christopher Havel
them - ask me sometime about my mother's old VAIO laptop and how it
ultimately died... the only thing in my test rig to wear out is the card
cage...
But, I'm not in charge, so I'll defer.
You make very good points about connector fatigue. I was planning to
leave everything connected and only install/remove the EOMA68 card
from the micro-desktop case. That works as long as we don't need to
test hot-plugging anything. To my knowledge we figured the hot-plug
capability would likely be conferred by the applicable standard and
thus were designing a basic functionality test.
(Incidentally I have a dead VAIO laptop in which the power jack center
pin broke. I really need to get that ordered and replaced.;>)
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Richard Wilbur
2018-03-02 21:20:17 UTC
Permalink
Post by Christopher Havel
Be careful... it was the replacing of the two ports on that old VGN-S360
that killed it... VAIOs are well known in repair circles for dying of
heatstroke from even the slightest rework (and I was duly warned)... if
it's a modular jack (on a cable, so no soldering), you'll be fine. If you
need an iron... buy a board, not a port. Trust me.
I'll have to open the case and take a look to see what the particulars of the situation are. Thank you for sounding the voice of experience. I consider myself forewarned.
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Luke Kenneth Casson Leighton
2018-03-02 01:57:20 UTC
Permalink
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68


On Fri, Mar 2, 2018 at 12:10 AM, Christopher Havel
Post by Christopher Havel
Posting from my phone while making dinner, so forgive that it's a top-post
plz.
done but not for using the phone instead of enjoying dinner! :)
Post by Christopher Havel
Testing via the micro desktop works as long as you've got a known good
micro desktop and your ports haven't won through.
two separate tests strictly speaking needed, one is of Card(s), the
other is of Micro-Desktop(s),

one way to do that: known-good MD tests cards. known-good Card tests MDs.

l.

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Luke Kenneth Casson Leighton
2018-03-02 03:31:31 UTC
Permalink
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68


On Thu, Mar 1, 2018 at 10:02 PM, Richard Wilbur
Post by Richard Wilbur
If we did decide to roll a v1.8 micro-desktop board, it would afford
us the opportunity to bring two of the presently unconnected GPIO18-21
lines to the expansion header in place of VESA_SCL and VESA_SDA (which
are after all available on pins 15 and 12 of the VGA connector). If
VESA_SCL and VESA_SDA are more useful on the expansion header then, by
all means, forget this suggestion.
the reason i brought those out is just in case someone decided they
wanted to use them as plain GPIO.
Post by Richard Wilbur
The other option to accommodate all our GPIO goodness would be to
replace J5 (2x10 header) with a 2x11 or 2x12 header
yep.
Post by Richard Wilbur
allowing us to
bring all the GPIO pins to the expansion header (the only difference
being whether we would prefer to retain VESA_SCL and VESA_SDA in the
header).
yes.

l.

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Richard Wilbur
2018-03-02 22:52:46 UTC
Permalink
Post by Luke Kenneth Casson Leighton
On Thu, Mar 1, 2018 at 10:02 PM, Richard Wilbur
Post by Richard Wilbur
If we did decide to roll a v1.8 micro-desktop board, it would afford
us the opportunity to bring two of the presently unconnected GPIO18-21
lines to the expansion header in place of VESA_SCL and VESA_SDA (which
are after all available on pins 15 and 12 of the VGA connector). If
VESA_SCL and VESA_SDA are more useful on the expansion header then, by
all means, forget this suggestion.
the reason i brought those out is just in case someone decided they
wanted to use them as plain GPIO.
Having the most available GPIO pins sounds like a great goal for the micro-desktop. But at the expense of a fully operational VGA interface when we have four more GPIO pins that we could choose from--seems like maybe we could take a better tradeoff?
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
The other option to accommodate all our GPIO goodness would be to
replace J5 (2x10 header) with a 2x11 or 2x12 header
yep.
I would vote for a 2x11 header with the four other GPIO's connected and the VESA DDC lines not connected to the expansion header. That only requires the expansion to extend in length by 10%.


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Luke Kenneth Casson Leighton
2018-03-02 03:30:14 UTC
Permalink
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
Post by Richard Wilbur
It looks to me like the fastest way to test the GPIO lines connected
on the micro-desktop board to VESA_SCL and VESA_SDA would simply be to
connect a VGA monitor to the micro-desktop and make sure it is
properly detected and a test image looks right on it.
yep, pretty much... with one slight fly in the ointment: the SCL and
SDA lines are straight GPIO and will need a bit-banging I2C linux
kernel driver. once that's configured, doing i2cdetect _should_ be
enough to test the circuit, although scanning the data and running
read-edid on it would be awesome and amazing: it would mean being able
to *really* do proper VESA detection.

l.

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Richard Wilbur
2018-03-02 22:26:32 UTC
Permalink
On Mar 1, 2018, at 20:30, Luke Kenneth Casson Leighton <***@lkcl.net> wrote:


Sent from my iPhone
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
It looks to me like the fastest way to test the GPIO lines connected
on the micro-desktop board to VESA_SCL and VESA_SDA would simply be to
connect a VGA monitor to the micro-desktop and make sure it is
properly detected and a test image looks right on it.
yep, pretty much... with one slight fly in the ointment: the SCL and
SDA lines are straight GPIO and will need a bit-banging I2C linux
kernel driver. once that's configured, doing i2cdetect _should_ be
enough to test the circuit, although scanning the data and running
read-edid on it would be awesome and amazing: it would mean being able
to *really* do proper VESA detection.
Is someone already working on that? Sounds like we need the device tree for the micro-desktop to be populated. If we did it for micro-desktop v1.7 it would be something to build off for micro-desktop v1.8 and also a good place to begin for the laptop.

From what I'm hearing, once the device tree is ready we could work on "automagically" configuring the VESA DDC driver to bit-bang the correct GPIO pins. Does the bit-banging VESA DDC driver exist already? (I wrote a bit-banging I2C driver in VxWorks at a previous position so the topic is not foreign.)

If none of this is underway I'll continue mapping things out so we can create the device tree for the micro-desktop. If I remember correctly we also should create a device tree for the DS-113 v2.7.4 and v2.7.5?

I'd be happy to work on that if you think that is the highest priority right now. It sounds like it will help both testing and deployment.


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Jonathan Neuschäfer
2018-03-02 22:43:42 UTC
Permalink
Hello,
Post by Richard Wilbur
Sent from my iPhone
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
It looks to me like the fastest way to test the GPIO lines connected
on the micro-desktop board to VESA_SCL and VESA_SDA would simply be to
connect a VGA monitor to the micro-desktop and make sure it is
properly detected and a test image looks right on it.
yep, pretty much... with one slight fly in the ointment: the SCL and
SDA lines are straight GPIO and will need a bit-banging I2C linux
kernel driver. once that's configured, doing i2cdetect _should_ be
enough to test the circuit, although scanning the data and running
read-edid on it would be awesome and amazing: it would mean being able
to *really* do proper VESA detection.
Is someone already working on that? Sounds like we need the device
tree for the micro-desktop to be populated. If we did it for
micro-desktop v1.7 it would be something to build off for
micro-desktop v1.8 and also a good place to begin for the laptop.
I'm not actively working on any of this, but I'm interested in the
devicetree side of things.
Post by Richard Wilbur
From what I'm hearing, once the device tree is ready we could work on
"automagically" configuring the VESA DDC driver to bit-bang the
correct GPIO pins. Does the bit-banging VESA DDC driver exist already?
(I wrote a bit-banging I2C driver in VxWorks at a previous position so
the topic is not foreign.)
Mainline Linux has a driver[1] for I2C-over-GPIO. It's been there since
2.6.22, albeit initially without devicetree support, which came in 3.4.

There's also a generic devicetree binding[2] for I2C-over-GPIO in
Linux's Documentation/devicetree/bindings directory.
Post by Richard Wilbur
If none of this is underway I'll continue mapping things out so we can
create the device tree for the micro-desktop. If I remember correctly
we also should create a device tree for the DS-113 v2.7.4 and v2.7.5?
What is DS-113?
Post by Richard Wilbur
I'd be happy to work on that if you think that is the highest priority
right now. It sounds like it will help both testing and deployment.
Thanks,
Jonathan Neuschäfer


[1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/i2c/busses/i2c-gpio.c
[2]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/i2c/i2c-gpio.txt
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Luke Kenneth Casson Leighton
2018-03-03 01:37:15 UTC
Permalink
On Fri, Mar 2, 2018 at 10:43 PM, Jonathan Neuschäfer
Post by Jonathan Neuschäfer
Hello,
I'm not actively working on any of this, but I'm interested in the
devicetree side of things.
excellent, can you look up the status of A20 and the devicetree fragments?
Post by Jonathan Neuschäfer
What is DS-113?
board design codename.

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Jonathan Neuschäfer
2018-03-03 02:44:48 UTC
Permalink
Post by Luke Kenneth Casson Leighton
On Fri, Mar 2, 2018 at 10:43 PM, Jonathan Neuschäfer
Post by Jonathan Neuschäfer
Hello,
I'm not actively working on any of this, but I'm interested in the
devicetree side of things.
excellent, can you look up the status of A20 and the devicetree fragments?
There has been some work on HDMI on the A10/A20 in October (merged in
4.15): https://www.spinics.net/lists/devicetree/msg198941.html
Reportedly, HDMI works now. I'm not sure what else was/is missing.

About DT fragments: I'm not sure what you mean exactly. Mainline support
devicetree overlays which should do (half of) the job for EOMA68, though.
The tricky part would be figuring out how the same overlay can be used
on base devicetrees for different SoCs, as the exposed busses will have
different names. This may be solved by a future iteration of this
patchset: https://www.spinics.net/lists/kernel/msg2710913.html

The other side of the DT job is the dynamic loading of a devicetree
overlay based on the EEPROM of the connected housing. Mainline Linux
doesn't have something like capemgr[1], AFAIK; But I think this could
also be handled in userspace.
And then there's the question of how the kernel/userspace is supposed to
know on which i2c bus it finds the EOMA68 EEPROM.


Jonathan

[1]: https://elinux.org/Capemgr
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Luke Kenneth Casson Leighton
2018-03-03 03:46:33 UTC
Permalink
On Sat, Mar 3, 2018 at 2:44 AM, Jonathan Neuschäfer
Post by Jonathan Neuschäfer
Post by Luke Kenneth Casson Leighton
excellent, can you look up the status of A20 and the devicetree fragments?
There has been some work on HDMI on the A10/A20 in October (merged in
4.15): https://www.spinics.net/lists/devicetree/msg198941.html
Reportedly, HDMI works now. I'm not sure what else was/is missing.
the *full* hardware set is needed. except for NAND, which has been
removed from 2.7.5.
Post by Jonathan Neuschäfer
About DT fragments: I'm not sure what you mean exactly. Mainline support
devicetree overlays which should do (half of) the job for EOMA68, though.
ah, yes, that's the official name. overlays.

question: do you know if they've added the patches to *REMOVE*
overlays yet? Cards could potentially be dynamically removed... or at
least put into sleep / suspend only to wake up with a totally
different Housing.
Post by Jonathan Neuschäfer
The tricky part would be figuring out how the same overlay can be used
on base devicetrees for different SoCs, as the exposed busses will have
different names.
... i'm not sure what you're referring to, here. do you have an example?
Post by Jonathan Neuschäfer
This may be solved by a future iteration of this
patchset: https://www.spinics.net/lists/kernel/msg2710913.html
there's nothing mentioned about what standard he's referring to. is
there a link, or can you do a quick summary?
Post by Jonathan Neuschäfer
The other side of the DT job is the dynamic loading of a devicetree
overlay based on the EEPROM of the connected housing.
yes that's correct.
Post by Jonathan Neuschäfer
Mainline Linux
doesn't have something like capemgr[1], AFAIK; But I think this could
also be handled in userspace.
it has to be handled in u-boot (at least partially).
Post by Jonathan Neuschäfer
And then there's the question of how the kernel/userspace is supposed to
know on which i2c bus it finds the EOMA68 EEPROM.
good point. the bus utilised will be in the Card's devicetree file:
it will have to be named as such.

l.

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Pablo Rath
2018-03-03 19:53:36 UTC
Permalink
Post by Luke Kenneth Casson Leighton
On Sat, Mar 3, 2018 at 2:44 AM, Jonathan Neuschäfer
...
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
About DT fragments: I'm not sure what you mean exactly. Mainline support
devicetree overlays which should do (half of) the job for EOMA68, though.
ah, yes, that's the official name. overlays.
question: do you know if they've added the patches to *REMOVE*
overlays yet? Cards could potentially be dynamically removed... or at
least put into sleep / suspend only to wake up with a totally
different Housing.
The whole DT overlay discussion rang a bell somewhere in my brain and
now I had time to look it up. I read about a DT overlay hack here:
https://joeyh.name/blog/entry/easy-peasy-devicetree-squeezy/
Please read the README for details.
Can the above hack be of some use to the EOMA project until "patches to
fully support overlays, including loading them on the fly into a running
system" are mainlined?
I can not answer the question myself because I am not into DT overlays.

It seems we are not the only one with DT overlay problems:
https://elinux.org/BeagleBone_and_the_3.8_Kernel#Cape_Manager_and_Device_Tree_Overlays

kind regards
Pablo

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Luke Kenneth Casson Leighton
2018-03-03 20:11:27 UTC
Permalink
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
Post by Pablo Rath
Post by Luke Kenneth Casson Leighton
On Sat, Mar 3, 2018 at 2:44 AM, Jonathan Neuschäfer
...
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
About DT fragments: I'm not sure what you mean exactly. Mainline support
devicetree overlays which should do (half of) the job for EOMA68, though.
ah, yes, that's the official name. overlays.
question: do you know if they've added the patches to *REMOVE*
overlays yet? Cards could potentially be dynamically removed... or at
least put into sleep / suspend only to wake up with a totally
different Housing.
The whole DT overlay discussion rang a bell somewhere in my brain and
https://joeyh.name/blog/entry/easy-peasy-devicetree-squeezy/
Please read the README for details.
Can the above hack be of some use to the EOMA project until "patches to
fully support overlays, including loading them on the fly into a running
system" are mainlined?
as long as people are happy to have the linux kernel source tarball
on their system... yes.

and they are happy not to have 100% working hardware.
Post by Pablo Rath
https://elinux.org/BeagleBone_and_the_3.8_Kernel#Cape_Manager_and_Device_Tree_Overlays
yyup. and they don't have the dynamic removal.

l.

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Jonathan Neuschäfer
2018-03-04 00:20:39 UTC
Permalink
Post by Luke Kenneth Casson Leighton
On Sat, Mar 3, 2018 at 2:44 AM, Jonathan Neuschäfer
Post by Jonathan Neuschäfer
Post by Luke Kenneth Casson Leighton
excellent, can you look up the status of A20 and the devicetree fragments?
There has been some work on HDMI on the A10/A20 in October (merged in
4.15): https://www.spinics.net/lists/devicetree/msg198941.html
Reportedly, HDMI works now. I'm not sure what else was/is missing.
the *full* hardware set is needed. except for NAND, which has been
removed from 2.7.5.
I understand.

But I'm not deeply familiar with the A20 and don't have one around for
testing, so I don't now how close we are to that goal.
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
About DT fragments: I'm not sure what you mean exactly. Mainline support
devicetree overlays which should do (half of) the job for EOMA68, though.
Turns out I was wrong about this. Mainline supports the bare core
functionality to apply/unapply DT overlays, but it doesn't expose this
functionality to userspace.
Post by Luke Kenneth Casson Leighton
ah, yes, that's the official name. overlays.
question: do you know if they've added the patches to *REMOVE*
overlays yet? Cards could potentially be dynamically removed... or at
least put into sleep / suspend only to wake up with a totally
different Housing.
Post by Jonathan Neuschäfer
The tricky part would be figuring out how the same overlay can be used
on base devicetrees for different SoCs, as the exposed busses will have
different names.
... i'm not sure what you're referring to, here. do you have an example?
Let's say you have an expansion board that connects to a pair of UART
pins and has a bluetooth module on it (simplifying here, because EOMA68
is more complex than necessary for this example).

On A20 you might want to use the UART controller at 0x1c28800 (just an
example), which has the label uart2. But on RK3399 you might want to use
the UART at 0xff180000, labeled uart0. Now the overlay for A20 would
look something like this:

/plugin/;
/ {
...

***@0 {
target = <&uart2>;
__overlay__ {
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <921600>;
};
};
};
};

But for RK3399, you'd have to change that to target = <&uart0>.
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
This may be solved by a future iteration of this
patchset: https://www.spinics.net/lists/kernel/msg2710913.html
there's nothing mentioned about what standard he's referring to. is
there a link, or can you do a quick summary?
This snippet? "It would be good to have a way to expose #<list>-cells
types of providers through a connector in a standard way."
(That's the only occurence of "standard" on that page)

This work is about coming up with a convention (a "standard" in the
general sense) to express the remapping of, at first, GPIOs in DT to
give them consistent names from the point of view of an expansion
interface.

Or did you mean something else by "what standard he's referring to"?
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
The other side of the DT job is the dynamic loading of a devicetree
overlay based on the EEPROM of the connected housing.
yes that's correct.
Post by Jonathan Neuschäfer
Mainline Linux
doesn't have something like capemgr[1], AFAIK; But I think this could
also be handled in userspace.
it has to be handled in u-boot (at least partially).
Why in u-boot? u-boot won't be around to do something when the card is
hot-plugged, right?
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
And then there's the question of how the kernel/userspace is supposed to
know on which i2c bus it finds the EOMA68 EEPROM.
it will have to be named as such.
(Somewhat answering my own question:)
I guess there could be something like a DT node that collects all the
pieces that go into the EOMA68 interface:

eoma68: connector {
compatible = "eoma,eoma68-connector";
gpios = <&gpio0 0
&gpio2 14
... >;
i2c = <&i2c3>;
spi = <&spi4>;
...
};

And then the overlays could be written to always attach to &eoma68.


Thanks,
Jonathan





---
Because it might be of interest to some who aren't familiar with
devicetree source syntax, let's go over that example line by line:

eoma68: connector {

A new node is defined. Nodes start with a name and an opening
curly bracket. The node is named "connector". Its path would be
/.../connector, depending on the names of the outer nodes.

A label "eoma68" points at this node, so the node can be referenced in
other places without using the full path.


compatible = "eoma,eoma68-connector";

This is a property of the connector node. It only has a name and a
value. Every property and node is terminated with a semicolon.

The "compatible" property tells the OS that the device described by this
node is an EOMA68 connector, and allows the right drivers to be
selected. The syntax of a "compatible" string is vendor,device.


i2c = <&i2c3>;

This property's value is a "phandle" (property handle). It points at the
node with the label "i2c3".


gpios = <&gpio0 0
&gpio2 14
... >;

In this property, we see pairs of data: A phandle pointing at a GPIO
controller, and a plain number, representing the GPIO pin within that
GPIO controller.


spi = <&spi4>;
...

More properties.


};

This is the end of the node.

The meaning of all these properties is specified in a devicetree
"binding". An example of a DT binding is that of the Allwinner A10's SPI
controller, which is also used in the A20:
https://www.kernel.org/doc/Documentation/devicetree/bindings/spi/spi-sun4i.txt

There's also a devicetree specification, available at:
https://www.devicetree.org/specifications/
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Luke Kenneth Casson Leighton
2018-03-04 03:41:39 UTC
Permalink
On Sun, Mar 4, 2018 at 12:20 AM, Jonathan Neuschäfer
Post by Jonathan Neuschäfer
Let's say you have an expansion board that connects to a pair of UART
pins and has a bluetooth module on it (simplifying here, because EOMA68
is more complex than necessary for this example).
On A20 you might want to use the UART controller at 0x1c28800 (just an
example), which has the label uart2. But on RK3399 you might want to use
the UART at 0xff180000, labeled uart0. Now the overlay for A20 would
/plugin/;
/ {
...
target = <&uart2>;
__overlay__ {
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <921600>;
};
};
};
};
But for RK3399, you'd have to change that to target = <&uart0>.
ok so i thought that was taken care of by using numerical ids. you'd
then place the main device-tree definition in a reference.

i'm sure this can be taken care of by having a definition of EOMA68
(by name) where things like <&uart0> are placed *into* that definition
on a per-CPU (per Card) basis.

so you would just have different "implementations" of the EOMA68
Standard pinouts in each Card dtb.
Post by Jonathan Neuschäfer
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
This may be solved by a future iteration of this
patchset: https://www.spinics.net/lists/kernel/msg2710913.html
there's nothing mentioned about what standard he's referring to. is
there a link, or can you do a quick summary?
This snippet? "It would be good to have a way to expose #<list>-cells
types of providers through a connector in a standard way."
(That's the only occurence of "standard" on that page)
This work is about coming up with a convention (a "standard" in the
general sense) to express the remapping of, at first, GPIOs in DT to
give them consistent names from the point of view of an expansion
interface.
Or did you mean something else by "what standard he's referring to"?
apologies, i just don't have any context... and damnit i have such a
lot else i'm doing at the moment, on deadlines, that i'm not able to
fully focus
Post by Jonathan Neuschäfer
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
The other side of the DT job is the dynamic loading of a devicetree
overlay based on the EEPROM of the connected housing.
yes that's correct.
Post by Jonathan Neuschäfer
Mainline Linux
doesn't have something like capemgr[1], AFAIK; But I think this could
also be handled in userspace.
it has to be handled in u-boot (at least partially).
Why in u-boot? u-boot won't be around to do something when the card is
hot-plugged, right?
u-boot may need to know that it has to pull up certain GPIOs in order
to switch on the LCD so that people can choose what to do. it may
need to know *that* there is an LCD (and what type).

all that information can only be safely obtained by identifying the
Housing through its EEPROM ID.
Post by Jonathan Neuschäfer
Post by Luke Kenneth Casson Leighton
Post by Jonathan Neuschäfer
And then there's the question of how the kernel/userspace is supposed to
know on which i2c bus it finds the EOMA68 EEPROM.
it will have to be named as such.
(Somewhat answering my own question:)
I guess there could be something like a DT node that collects all the
eoma68: connector {
compatible = "eoma,eoma68-connector";
gpios = <&gpio0 0
&gpio2 14
... >;
i2c = <&i2c3>;
spi = <&spi4>;
...
};
And then the overlays could be written to always attach to &eoma68.
yes. that's how i imagined it would work.

l.

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Richard Wilbur
2018-03-03 07:11:02 UTC
Permalink
[…]
Post by Jonathan Neuschäfer
I'm not actively working on any of this, but I'm interested in the
devicetree side of things.
To what does your interest in devicetree extend? Are you interested in helping create the devicetree mappings for EOMA68 hardware, or following developments, etc. How would you like to be involved? Thank you for imparting your knowledge below.
Post by Jonathan Neuschäfer
Post by Richard Wilbur
From what I'm hearing, once the device tree is ready we could work on
"automagically" configuring the VESA DDC driver to bit-bang the
correct GPIO pins. Does the bit-banging VESA DDC driver exist already?
(I wrote a bit-banging I2C driver in VxWorks at a previous position so
the topic is not foreign.)
Mainline Linux has a driver[1] for I2C-over-GPIO. It's been there since
2.6.22, albeit initially without devicetree support, which came in 3.4.
There's also a generic devicetree binding[2] for I2C-over-GPIO in
Linux's Documentation/devicetree/bindings directory.
That's wonderful news! So with the devicetree for the micro-desktop we should be able to setup the I2C driver. Next question: has anyone created a VESA DDC driver that will get the EDID from any connected monitor given when given access to an I2C device (as exposed by our bit-banging I2C driver).

VESA DDC is a standard that specifies a protocol on top of I2C for obtaining monitor information (supported resolutions and timings, color gamma, etc.).
Post by Jonathan Neuschäfer
Post by Richard Wilbur
If none of this is underway I'll continue mapping things out so we can
create the device tree for the micro-desktop. If I remember correctly
we also should create a device tree for the DS-113 v2.7.4 and v2.7.5?
What is DS-113?
EOMA68-A20 the CPU card.


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Luke Kenneth Casson Leighton
2018-03-03 08:04:56 UTC
Permalink
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
Post by Richard Wilbur
VESA DDC is a standard that specifies a protocol on top of I2C for obtaining monitor information (supported resolutions and timings, color gamma, etc.).
https://stackoverflow.com/questions/5065159/reading-edid-from-eeprom

so the relevant linux kernel video driver is capable of reading EDID
data... the thing that i know for a fact will be missing is that
nobody will have done EDID-to-A20 video timings conversion in the
linux kernel. it's all hard-coded.

l.

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Jonathan Neuschäfer
2018-03-04 01:11:22 UTC
Permalink
Post by Richard Wilbur
[…]
Post by Jonathan Neuschäfer
I'm not actively working on any of this, but I'm interested in the
devicetree side of things.
To what does your interest in devicetree extend? Are you interested
in helping create the devicetree mappings for EOMA68 hardware, or
following developments, etc. How would you like to be involved?
Thank you for imparting your knowledge below.
Following the development and discussions like this, and offering some
input every now and then.

I might also write some small kernel patches.
Post by Richard Wilbur
Post by Jonathan Neuschäfer
Post by Richard Wilbur
From what I'm hearing, once the device tree is ready we could work on
"automagically" configuring the VESA DDC driver to bit-bang the
correct GPIO pins. Does the bit-banging VESA DDC driver exist already?
(I wrote a bit-banging I2C driver in VxWorks at a previous position so
the topic is not foreign.)
Mainline Linux has a driver[1] for I2C-over-GPIO. It's been there since
2.6.22, albeit initially without devicetree support, which came in 3.4.
There's also a generic devicetree binding[2] for I2C-over-GPIO in
Linux's Documentation/devicetree/bindings directory.
That's wonderful news! So with the devicetree for the micro-desktop we should be able to setup the I2C driver. Next question: has anyone created a VESA DDC driver that will get the EDID from any connected monitor given when given access to an I2C device (as exposed by our bit-banging I2C driver).
VESA DDC is a standard that specifies a protocol on top of I2C for obtaining monitor information (supported resolutions and timings, color gamma, etc.).
Post by Jonathan Neuschäfer
Post by Richard Wilbur
If none of this is underway I'll continue mapping things out so we can
create the device tree for the micro-desktop. If I remember correctly
we also should create a device tree for the DS-113 v2.7.4 and v2.7.5?
The devicetree for the CPU card should be relatively straight-forward,
at least the parts that don't involve the EOMA68 connector.

And for the connector and what's beyond, I see two solutions:

Short-term solution:
Write an A20-specific DT snippet, either as an overlay that's loaded
by u-boot (this will preclude hot-plug of the card into a different
housing).

Long-term solution:
Work with the mainline kernel folks to create something that lets us
represent SoC-independent connectors properly, and also implement DTo
loading based on the config EEPROM.
Post by Richard Wilbur
Post by Jonathan Neuschäfer
What is DS-113?
EOMA68-A20 the CPU card.
Aaah! Thanks.


Jonathan
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Luke Kenneth Casson Leighton
2018-03-04 03:28:46 UTC
Permalink
On Sun, Mar 4, 2018 at 1:11 AM, Jonathan Neuschäfer
Post by Jonathan Neuschäfer
Work with the mainline kernel folks to create something that lets us
represent SoC-independent connectors properly, and also implement DTo
loading based on the config EEPROM.
beaglebone looks like they've implemented something like this
already. question is, is it already in u-boot as well.

l.

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Richard Wilbur
2018-03-04 03:55:17 UTC
Permalink
On Sat, Mar 3, 2018 at 12:11 AM, Richard Wilbur
Has anyone created a VESA DDC driver that will get the EDID from any connected monitor given when given access to an I2C device (as exposed by our bit-banging I2C driver).
VESA DDC is a standard that specifies a protocol on top of I2C for obtaining monitor information (supported resolutions and timings, color gamma, etc.).
Looks like ddcutil[*] provides (reasonably up-to-date) VESA DDC functionality.

Reference:

[*] http://www.ddcutil.com/

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Luke Kenneth Casson Leighton
2018-03-03 01:31:08 UTC
Permalink
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68


On Fri, Mar 2, 2018 at 10:26 PM, Richard Wilbur
Post by Richard Wilbur
Sent from my iPhone
Post by Luke Kenneth Casson Leighton
Post by Richard Wilbur
It looks to me like the fastest way to test the GPIO lines connected
on the micro-desktop board to VESA_SCL and VESA_SDA would simply be to
connect a VGA monitor to the micro-desktop and make sure it is
properly detected and a test image looks right on it.
yep, pretty much... with one slight fly in the ointment: the SCL and
SDA lines are straight GPIO and will need a bit-banging I2C linux
kernel driver. once that's configured, doing i2cdetect _should_ be
enough to test the circuit, although scanning the data and running
read-edid on it would be awesome and amazing: it would mean being able
to *really* do proper VESA detection.
Is someone already working on that?
no.
Post by Richard Wilbur
Sounds like we need the device tree for the micro-desktop to be
populated.
patches to linux mainline are needed to include the ability to have
devicetree fragments before that can happen.

however... the A20 linux sunxi mainline source is *not 100%
functional* so it's kinda moot.
Post by Richard Wilbur
If we did it for micro-desktop v1.7 it would be something to build off for micro-desktop v1.8 and also a good place to begin for the laptop.
From what I'm hearing, once the device tree is ready we could work
on "automagically" configuring the VESA DDC driver to bit-bang the
correct GPIO pins. Does the bit-banging VESA DDC driver exist already?
(I wrote a bit-banging I2C driver in VxWorks at a previous position so
the topic is not foreign.)
i found a random driver somewhere for I2C - don't know about the
linking to userspace / DDC.
Post by Richard Wilbur
If none of this is underway I'll continue mapping things out so we can
create the device tree for the micro-desktop.
that would be useful... *if* the A20 linux sunxi mainline source
supports 100% of the functionality of an A20.
Post by Richard Wilbur
If I remember correctly we also should create a device tree for the DS-113 v2.7.4 and v2.7.5?
again same caveat.... *thinks*.... yeah.
Post by Richard Wilbur
I'd be happy to work on that if you think that is the highest
priority right now. It sounds like it will help both testing and
deployment.
let me think...

two conditional things need to happen:

1. the A20 sunxi mainline code needs to have 100% functionality
support for ALL hardware

2. the "devicetree fragment" patch also needs to be confirmed as mainline.

then it's useful.

l.

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S
Bluey
2018-01-22 09:07:30 UTC
Permalink
Hi Luke,

I have some memory of a request for help in transferring the EOMA standard from the elinux.org site to markdown format (as a step towards publishing it on eoma68.com) but can’t find the exact reference in the mailing list archives. If I’ve remembered that correctly, and it’s something you are looking for help with, I’d be happy to volunteer.

I have some experience with static-site generators (that, as you’d know, use markdown documents as source files), and could assemble something along those lines if you’d like. Here’s a quick mockup of a site for the EOMA standard using the MkDocs engine: https://my.pcloud.com/publink/show?code=kZP6WH7ZvLbZLKwpHaokSVkeG02gqd7dt5wQxEdk <https://my.pcloud.com/publink/show?code=kZP6WH7ZvLbZLKwpHaokSVkeG02gqd7dt5wQxEdk>

The present mockup design is based on the assumption that the specifications for all current and future EOMA standards would be housed on the same website (EOMA-26, EOMA-CF, EOMA-68, etc.); this would, I presume, consequently require the use of a more generic domain name (e.g., EOMAstandard.info/.org) instead of EOMA-68.com but obviously I’ll leave the decision about which way to go with you. I can easily change the site design to just cover EOMA-68 should that be your preference.

You’ll notice that I’ve added in some suggested extra pages including: ‘Contribute', ‘About', 'News', and ‘FAQs'. For the ‘Contribute' page, I had in mind suggesting that people could offer technical, marketing, or financial support to the project.

If you’d just prefer the pages in markdown (not assembled as a MkDocs site) I can also just do that, in which case I could just create a collection of individual pages in a flat file structure and leave any internal page links I find as they are.

Cheers,
Bluey

P.S. I have noticed that sometimes various versions of the standard (e.g., EOMA-68) are written with a hyphen and sometimes without. I personally feel that the best format would be to include some nominated character to clearly indicate that there are multiple variations of the standard. You could then use a different character to indicate variation according to type of SOC.

For instance, the format might be: EOMA or EOMA-, EOMA-NN, and EOMA-NN:XYZ. Examples would then be...

EOMA or EOMA-
EOMA-26, EOMA-68, EOMA-200, etc.
EOMA-68:A20, EOMA-68:RISC-V, EOMA-68:RK3399, etc.

OR, swap the colon and hyphens around...

EOMA or EOMA:
EOMA:26, EOMA:68, EOMA:200, etc.
EOMA:68-A20, EOMA:68-RISC-V, EOMA:68-RK3399, etc.

OR, use the pipe or other symbol for SOC...

EOMA or EOMA:
EOMA:26, EOMA:68, EOMA:200, etc.
EOMA:68|A20, EOMA:68|RISC-V, EOMA:68|RK3399, etc.

EOMA or EOMA:
EOMA:26, EOMA:68, EOMA:200, etc.
EOMA:68~A20, EOMA:68~RISC-V, EOMA:68~RK3399, etc.
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Luke Kenneth Casson Leighton
2018-01-22 11:35:21 UTC
Permalink
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
Post by Bluey
Hi Luke,
I have some memory of a request for help in transferring the EOMA standard from the elinux.org site to markdown format (as a step towards publishing it on eoma68.com) but can’t find the exact reference in the mailing list archives. If I’ve remembered that correctly, and it’s something you are looking for help with, I’d be happy to volunteer.
oh - no it was a discussion where i assessed and preferred - at the
time - that the standard remain (for now) independent and hosted on an
independent third party site.

whilst i really like the idea of having a special dedicated domain
for it, the other problem is, the elinux.org site now has quite a high
page-rank for the keyword search "EOMA68". what do you do with the
page there? remove it? that would reduce page-rank and cause quite a
lot of confusion, suddenly the standard doesn't exist any more??
what's going on??

so the solution i came up with was to simply iframe it.
Post by Bluey
I have some experience with static-site generators (that, as you’d know, use markdown documents as source files), and could assemble something along those lines if you’d like. Here’s a quick mockup of a site for the EOMA standard using the MkDocs engine: https://my.pcloud.com/publink/show?code=kZP6WH7ZvLbZLKwpHaokSVkeG02gqd7dt5wQxEdk <https://my.pcloud.com/publink/show?code=kZP6WH7ZvLbZLKwpHaokSVkeG02gqd7dt5wQxEdk>
The present mockup design is based on the assumption that the specifications for all current and future EOMA standards would be housed on the same website (EOMA-26, EOMA-CF, EOMA-68, etc.); this would, I presume, consequently require the use of a more generic domain name (e.g., EOMAstandard.info/.org) instead of EOMA-68.com but obviously I’ll leave the decision about which way to go with you. I can easily change the site design to just cover EOMA-68 should that be your preference.
You’ll notice that I’ve added in some suggested extra pages including: ‘Contribute', ‘About', 'News', and ‘FAQs'. For the ‘Contribute' page, I had in mind suggesting that people could offer technical, marketing, or financial support to the project.
i think, these would be great to have on something like eoma68.com
where the standard is iframe'd in.

the key thing to understand about the standard is that i, as the
"Guardian Of The Standard", am NOT PERMITTED to manufacture or in any
way compete with people who may wish to be implementors of the
standard. i can barely get away with the current campaign by claiming
to be a "contracted assistant and advisor on EOMA68 to a sponsor, a
commercial company named ThinkPenguin". me personally actually making
a PROFIT out of being such an assistant and advisor to ThinkPenguin is
an absolute NO.
Post by Bluey
If you’d just prefer the pages in markdown (not assembled as a MkDocs site) I can also just do that, in which case I could just create a collection of individual pages in a flat file structure and leave any internal page links I find as they are.
Cheers,
Bluey

P.S. I have noticed that sometimes various versions of the standard (e.g., EOMA-68) are written with a hyphen and sometimes without.
this was discussed 2 years ago. the glossary section explains it.
the hyphen is *NOT* correct. if you find any location which says
"EOMA-NN" please let me know and i will correct it.
Post by Bluey
I personally feel that the best format would be to include some nominated character to clearly indicate that there are multiple variations of the standard. You could then use a different character to indicate variation according to type of SOC.
the decision was made 2 years ago to go with EOMANN-{specialisation}
e.g. EOMA68-A20.

l.

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Bluey
2018-01-23 03:43:06 UTC
Permalink
Post by Luke Kenneth Casson Leighton
oh - no it was a discussion where i assessed and preferred - at the
time - that the standard remain (for now) independent and hosted on an
independent third party site.
No worries.
Post by Luke Kenneth Casson Leighton
whilst i really like the idea of having a special dedicated domain
for it, the other problem is, the elinux.org site now has quite a high
page-rank for the keyword search "EOMA68". what do you do with the
page there? remove it? that would reduce page-rank and cause quite a
lot of confusion, suddenly the standard doesn't exist any more??
what's going on??
so the solution i came up with was to simply iframe it.
When/if you decide to move the standard, my suggestion would be to put some text on the existing elinux EOMA pages to say that the standard has moved to a dedicated site. Over time the page ranks would shift over to the new site. There would also be a number of other SEO activities we could do to boost the page ranking once the new site is up.
Post by Luke Kenneth Casson Leighton
Post by Bluey
You’ll notice that I’ve added in some suggested extra pages including: ‘Contribute', ‘About', 'News', and ‘FAQs'. For the ‘Contribute' page, I had in mind suggesting that people could offer technical, marketing, or financial support to the project.
i think, these would be great to have on something like eoma68.com
where the standard is iframe'd in.
Cool.
Post by Luke Kenneth Casson Leighton
the key thing to understand about the standard is that i, as the
"Guardian Of The Standard", am NOT PERMITTED to manufacture or in any
way compete with people who may wish to be implementors of the
standard. i can barely get away with the current campaign by claiming
to be a "contracted assistant and advisor on EOMA68 to a sponsor, a
commercial company named ThinkPenguin". me personally actually making
a PROFIT out of being such an assistant and advisor to ThinkPenguin is
an absolute NO.
Sure, I understand. However, I think we can keep it clean/ethical and differentiate between the various projects/teams/individuals easily enough. I would suggest the following financial and donations setup:

- an ‘Individual' liberapay account for you, Luke, as a libre developer (this is already in place at https://liberapay.com/lkcl/ <https://liberapay.com/lkcl/>);

- a ‘Team' liberapay account for EOMA standard* development, web hosting, and administration (including a percentage of money as wages for those working on the standard); and

- in addition to any money earned through Crowd Supply, an ‘Organisation’ or ‘Team’ liberapay account for Earth-friendly Computers that is managed by its sponsor, ThinkPenguin, with money directed to the project as the sponsor sees fit or that it explicitly specifies upfront. This might involve using the money to pay, for example, for equipment, raw materials, employee wages, marketing, or contracted assistants and advisors).


* Note, for this 2nd item, that it seems reasonable to me that developing a standard takes legitimate resources that include website hosting, equipment, and time. To me, that’s not profit. Although ISO, IEC, etc. are commercial entities, some of the money they make goes to paying for those standards to be developed plus any and all employee and administrative costs.

Essentially, I think of the EOMA standards project—in all but name—as a non-profit organisation that has operating costs.
Post by Luke Kenneth Casson Leighton
Post by Bluey
P.S. I have noticed that sometimes various versions of the standard (e.g., EOMA-68) are written with a hyphen and sometimes without.
this was discussed 2 years ago. the glossary section explains it.
the hyphen is *NOT* correct. if you find any location which says
"EOMA-NN" please let me know and i will correct it.
Okay, no worries.

To start with, I think most of the pages on elinux.org need reviewing, for example:
https://elinux.org/Embedded_Open_Modular_Architecture <https://elinux.org/Embedded_Open_Modular_Architecture> (search for 'EOMA-‘ and you should find 7 matches)

Plus all of the pages for the individual standards (EOMA-68, EOMA-200, etc.)

The Crowd Supply site looks good. I found just two references to EOMA-68 (one on the front page referenced from an external review) plus one in the title of an update from 2016.

Your liberapay page is fine:
https://liberapay.com/lkcl/ <https://liberapay.com/lkcl/>

There are various references on the Rhombus-Tech site if you put ‘EOMA-‘ in the search box.

I’m not across any other sites you might have for the project, sorry.

Cheers,
Bluey





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